Faraday Picks Silicon Frontline’s F3D for Accurate Post-Layout 3D Extraction of Analog and Digital Converters
Silicon Frontline Technology, Inc. announced today that, after an extensive evaluation of post-layout verification tool offerings, Faraday picked Silicon Frontline’s F3D for its accurate 3D extraction. The high accuracy results of F3D for Faraday’s Analog to Digital Converters made it the only tool to match silicon and achieve the desired accuracy.
“Our highly sensitive ADC circuits have a very tight tolerance and we found that only Silicon Frontline’s F3D was capable of delivering the results we needed with exceptional performance and the required accuracy,” said Dr. Yu, Director of Faraday. “The matching of differential signals is critical in analog designs and F3D was able to highlight if and when any differences occurred.”
Silicon Frontline’s post-layout verification software delivers Guaranteed Accuracy, full-chip capacity and performance at least 20 times faster than other commercial field solvers. Users specify the level of accuracy desired, net by net, at the block level or with regular expressions. In this way, the resulting parasitics are guaranteed correct within the specified accuracy range for better design quality.
“Our 3D post-layout verification software continues to be accepted and used by the world’s leading semiconductor companies,” said Yuri Feinberg, CEO. “We are proud to have Faraday choose our highly accurate 3D post-layout extraction software product, F3D, for post-layout verification of its ADCs.
Silicon Frontline’s software has been used to accurately verify over 300 electronic designs to date. The company’s customers use its software to analyze power devices, improve image sensors, ADCs, flash memories, differential signals and nanometer and Analog Mixed Signal designs. The customer list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.