Silicon Frontline Promotes Guaranteed Accurate 3D Post-Layout Extraction for Power Devices and Image Sensors at Upcoming Events
Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company in the post-layout verification market focused on solutions for nanometer design applications, is attending the select events in May and June: the 23rd International Symposium On Power Semiconductor Devices and ICs (ISPSD) and the 48th Design Automation Conference (DAC) in San Diego, and the International Image Sensor Workshop (IISW) in Hokkaido, Japan.
At ISPSD, Dr. Maxim Ershv, CTO of SFT, will present a tutorial on Physics, Challenges, and Solutions of Metal Layout Designs for Large Area Power Devices. At DAC, SFT will showcase its flagship Guaranteed Accurate products, F3D (Fast 3D) and R3D (Resistive 3D), as well as its new products. At IISW, Dr. Ershov will present a paper jointly written with authors from Silicon Frontline’s customer, Aptina, a leading provider of CMOS image sensors, titled Accurate capacitance and RC extraction software tool for pixel, sensor and precision analog designs.
About Silicon Frontline’s Products
F3D (Fast 3D) is used for fast 3D extraction and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D is chosen for its nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices.
Silicon Frontline’s software has been used to accurately verify over 300 electronic designs to date. The company’s customers use its software to analyze power devices, improve image sensors, ADCs, flash memories, differential signals and nanometer and Analog Mixed Signal (A/MS) designs. The customer list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.